Half Adder and Full Adder with Truth Table

Half Adder and Full Adder

An adder is a digital logic circuit that is used to perform the addition of numbers. Adders are an integral part of computers and various electronic gadgets that require numerical computing. In electronic devices, an adder circuit is usually present inside the arithmetic logical unit. There are basically two types of adder circuits, namely half adder and full adder. Both half adder and full adder circuits fall under the category of combinational logic circuits.

Half Adder in Digital Logic

A half adder is a simple digital logic circuit that adds up two one-bit binary numbers. The inputs of the half adder are given as input 1 and input 2. These are typically referred to as A and B. The two outputs of the half adder are known as sum and carry. These are generally denoted by the English alphabets S and C. There are basically four combinations of the two inputs that can be fed to a half adder.

Half Adder in Digital Logic

Truth Table for a Half Adder

The truth table for a half adder that tends to establish a relationship between the inputs and outputs of the logic circuit by denoting the truth or falsity of the output in accordance with a particular combination of input is given as follows:

Truth Table for a Half Adder

Truth Table for a Half Adder

Logical Expression for Sum

A EX-OR B

Logical Expression for Sum in a Half Adder

Logical Expression for Sum in a Half Adder

Logical Expression for Carry 

A AND B

Logical Expression for Carry in a Half Adder

Logical Expression for Carry in a Half Adder

Implementation of Half Adder

A half adder can be implemented simply with the help of two logical gates, namely an AND gate and an exclusive-OR gate. The exclusive-OR gate takes A and B as inputs and outputs the sum, while the AND gate takes A and B as input and delivers carry as output.

Implementation of Half Adder

Implementation of Half Adder

Full Adder in Digital Logic

A full adder is a digital logic circuit that obtains the sum of three one-bit binary numbers. The inputs of the full adder are given as input 1, input 2, and carry-in. These are typically referred to as A, B, and C-IN respectively. The two outputs of the full adder are known as sum and carry-out. These are generally denoted by S and C-OUT. There are eight possible combinations of the three inputs of a full adder.

Full Adder in Digital Logic

Truth Table for a Full Adder

The truth table for a full adder that tends to establish a relationship between the inputs and outputs of the logic circuit by denoting the truth or falsity of the output in accordance with a particular combination of input is given as follows:

Truth Table for a Full Adder

Logical Expression for SUM

= A’ B’ C-IN + A’ B C-IN’ + A B’ C-IN’ + A B C-IN

= C-IN (A’ B’ + A B) + C-IN’ (A’ B + A B’)

Therefore, Sum = C-IN XOR (A XOR B)

= (1,2,4,7)

Logical Expression for Sum in a Full Adder

Logical Expression for Sum in a Full Adder

Logical Expression for C-OUT

= A’ B C-IN + A B’ C-IN + A B C-IN’ + A B C-IN

Therefore, C-OUT = A B + B C-IN + A C-IN

= (3,5,6,7)

A comparatively simpler method to evaluate the boolean expression for carry is given as follows:

= A B + A C-IN + B C-IN (A + A’)

= A B C-IN + A B + A C-IN + A’ B C-IN

= A B (1 +C-IN) + A C-IN + A’ B C-IN

= A B + A C-IN + A’ B C-IN

= A B + A C-IN (B + B’) + A’ B C-IN

= A B C-IN + A B + A B’ C-IN + A’ B C-IN

= A B (C-IN + 1) + A B’ C-IN + A’ B C-IN

= A B + A B’ C-IN + A’ B C-IN

= AB + C-IN (A’ B + A B’)

Therefore, C-OUT = AB + C-IN (A EX-OR B)

Logical Expression for Carry in a Full Adder

Logical Expression for Carry in a Full Adder

Implementation of Full Adder

Using Half Adders 

A full adder can be implemented simply with the help of two half adders and an OR gate. The first half adder takes A and B as input to produce a partial sum. The second half adder takes C-IN and the partial sum generated by the first adder to produce the final sum. This final sum is denoted as S. The carry output produced by both the half adders is fed to an OR gate, which gives C-OUT as the final carry.

Implementation of Full Adder Using Half Adders

Implementation of Full Adder Using Half Adders

Using NAND Gates

A full adder digital logic circuit requires a total of 9 NAND gates for its implementation.

Implementation of Full Adder Using NAND Gates

Implementation of Full Adder Using NAND Gates

Using NOR Gates 

A full adder digital logic circuit requires a total of 9 NOR gates for its implementation.

Implementation of Full Adder Using NOR Gates 

Implementation of Full Adder Using NOR Gates

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